部  门： 微电子科学与工程系

职  称： 教授

邮  箱： wangyang@xtu.edu.cn

办公室：   物理楼主楼502

汪洋，女，1981年生，博士，教授，硕士生导师，2015年6月获qy球友会理学博士学位。研究兴趣为高压高防护级别ESD/TVS器件结构设计及机理研究、器件级和电路级建模、TCAD工艺及器件仿真方法研究、全芯片ESD防护设计。主持并完成省级以上项目3项。发表学术论文40篇，其中SCI收录25篇、EI收录会议论文10篇、获湖南省仪器仪表学会优秀论文一等奖2篇。获集成电路布图设计登记10项，授权发明专利12项，授权实用新型专2项。

学习工作经历

2003—至今  qy球友会 任教

2012—2015  qy球友会 球友会   凝聚态物理专业 攻读博士研究生

2004—2007  qy球友会 球友会   微电子学与固体电子学专业 攻读硕士研究生

研究方向

先进半导体器件与集成电路技术

科研项目

[1] 主持，《嵌套型双向可控硅TVS器件及其片上集成技术研究》，国自科基金青年项目（编号：61704145），22万元，2018年1月-2020年12月。

[2] 主持，《车用超高压新型可控硅ESD器件及其维持电压估算模型研究》，湖南省自科基金青年项目（编号：2019JJ50609），5万元，2019年1月-2020年12月。

代表性成果（专著、论文和专利等）

期刊论文：

[1] Wenjie   Guan, Yang Wang, Zhiqin Deng, Bo Yu, Xijun Chen, Xiangliang Jin, Hongjiao   Yang, Investigation on holding voltage of asymmetric DDSCR with floating   heavy doping in 0.18 μm CMOS process [J]. Solid-State Electronics,2023,   199(2023): 108486.

[2] Shuang Li,   Yang Wang, Hongke Tao, Qing Liu, Zhiwen Zeng, Xiangliang Jin, Hongjiao Yang.   Resistor-less power-rail ESD clamp circuit design with adjustable NMOS gate   biased voltage [J]. 38 (2023): 115010.

[3] Yang Wang,   Xuebing Su, Xiangliang Jin, Hongjiao Yang, Zijie Zhou. Design, Fabrication   and Measurement of LDNMOS-SCR Devices with Appropriate ESD Protection Window   for 18V HV CDMOS Process [J]. Journal of Microelectronics, Electronic   Components and Materials, 2022, 52(2):83–88.

[4] Xuebing   Su, Wang Yang, Xiangliang Jin, Hongjiao Yang. A High Performance Normally-Off   AlGaNGaN Split-Gate MIS-HEMT Using Piezo Neutralization Technique [J].   Journal of Nanoelectronics and Optoelectronics, 2022, 17(2022):1-9.

[5] Su, X.,   Wang, Y., Jin, X., Yang, H., Zhang, Y., Yang, S. and Yu, B. (2022), A high   performance RC-INV triggering SCR under 0.25 µm process [J]. Microelectronics   International, Vol. ahead-of-print No. ahead-of-print. https://doi.org/10.1108/MI-04-2022-0069

[6] Yang   Wang*, Jieyu Li, DanDan Jia, Weipeng Wei, Analyzing the impact of guard-ring   on different dual-direction SCR by device simulation and TLP measurement,   Microelectronics Reliability [J]. 2021, DOI: 10.1016/j.microrel.2021.114398.

[7] Yang   Wang*, Jieyu Li, Weipeng Wei, Pei Cao, Wenmiao Cao, Enhanced asymmetric DDSCR   with high robustness for high-voltage ESD protection [J]. International Journal   of Electronics Letters, 2021, DOI: 10.1080/21681724.2021.1969435.

[8] Weipeng   Wei, Yang Wang*, Xijun Chen, Yifei Zheng, Jieyu Li, Pei Cao, Wenmiao Cao.   Investigation of Different Conduction States on the Performance of NMOS‑Based Power Clamp   ESD Device [J]. Journal of Electrical Engineering & Technology, 2021,   16:1583-1589.

[9] Jia,Dandan;   Wang,Yang*; Chen, Xijun; Bao, Zhanying; Lu, Jun; Dong, Peng; Design and   analysis of a multi-finger dual-direction SCR discharging electro-static   current in a gradual transition manner [J]. Semiconductor Science and   Technology, 2020, 35(2020)：075017-075017.

[10] Wang,   Yang*; Chen, Xijun; Dong, Peng; Improvement of electrostatic discharge   current-handling capability for high-voltage multi-finger nLDMOS devices with   self-triggered technique [J]. Semiconductor Science and Technology, 2020,   35(2020)：065010-065010.

[11] Wang,   Yang*; Chen, Xijun; Jia, Dandan; Lu, Jun; Wei, Weipeng; Dong, Peng; The   influence of N-type buried layer on SCR ESD protection devices [J]. IEEE   Transactions on Device and Materials Reliability, 2020, 20(4)：658-666.

[12] Li,   Jieyu; Wang, Yang*; Jia, Dandan; Wei, Weipeng; Dong, Peng; New embedded DDSCR   structure with high holding voltage and high robustness for 12-V applications   [J]. Chinese Physics B, 2020, 29(10)：108501-108501.

[13] Chen,   Xijun; Wang, Yang*; Jin, Xiangliang; Zhou, Zijie; Lu, Jun; Jia, Dandan; An   ESD robust high holding voltage dual-direction SCR with symmetrical I-V curve   by inserting a floating P plus in PWell [J]. Solid-State Electronics, 2019,   160(2019)：0-107627.

[14] Ding,   Liqiang; Wang, Yang*; Bao, Zhanying; Liao, Hanzhang; Jin, Xiangliang; A   nano-ampere current reference circuit in a 0.5 μm CDMOS technology [J]. Microelectronics   Journal, 2019, 90(2019)：336-341.

[15] Zheng,   Yifei; Jin, Xiangliang; Wang, Yang*; Guan, Jian; Hao, Sanwan; Luo, Jun;   Island diodes triggering SCR in waffle layout with high failure current for   HV ESD protection [J]. Solid-State Electronics, 2019, 152(2019)：17-23.

[16] Jin,   Xiangliang; Zheng, Yifei; Wang, Yang*; Guan, Jian; Hao, Shanwan; Li, Kan;   Luo, Jun; ESD robustness improving for the low-voltage triggering   silicon-controlled rectifier by adding NWell at cathode [J]. Solid-State   Electronics, 2018, 139(2018)：69-74.

[17] Jian Guan,   Yang Wang*, Shanwan Hao, Yifei Zheng, Xiangliang Jin. A novel high holding   voltage dual-direction SCR with embedded structure for HV ESD protection [J].   IEEE Electron Device Letters, 2017, 38(12):1716-1719.

[18] Yang Wang，Xiangliang Jin*，Liu Yang，Robust LDMOS with Interleaved   Bulk and Source for High-Voltage ESD Protection [J]. IET Power Electronics,   2015, 8(11): 2251-2256.

[19] Yang Wang,   Xiangliang Jin*, Liu Yang, Qi Jiang，Huihui Yuan，Robust dual-direction SCR with low trigger voltage, tunable   holding voltage for high-voltage ESD protection [J]. Microelectronics   Reliability, 2015, 55(2015): 520-526.

会议论文：

[1] Z. Deng,   Y. Wang, Y. Zhang, B. Yu, W. Guan and H. Yang, "ESD Characteristics   Improving for DDSCR with NBL by Adding High Voltage N-type Well Isolation in   0.18-μm BCD Technology," 2022 10th International Symposium on   Next-Generation Electronics (ISNE), Wuxi, China, 2023, pp. 1-3, doi:   10.1109/ISNE56211.2023.10221621.

[2] Xuebing   Su, Yang Wang, Xiangliang Jin, Hongjiao Yang. Design of high voltage electrostatic   protection device for CAN bus[C]. Journal of Physics: Conference Series, 2022   2nd International Conference on Electronics, Circuits and Information   Engineering (ECIE-2022) 07/01/2022 - 09/01/2022, Volume 2221.

[3] W. Guan,   Y. Wang, B. Yu, Z. Deng and X. Chen, "Layout Geometry Impact on ESD   Robustness of Multi-Finger Asymmetric DDSCR Devices," 2022 International   EOS/ESD Symposium on Design and System (IEDS), Chengdu, China,   09/11/2022-11/11/2022, pp. 1-6.

发明专利：

[1] 汪洋，李婕妤，魏伟鹏，曹佩，曹文苗. 叉指方式的非对称双向可控硅静电释放器件及其制作方法，中国发明专利, 授权号：ZL   2020 1 0741325.0，2023.8.22.

[2] 杨浩泽，汪洋，杨红姣，窄设计窗口的对称双向可控硅静电防护器件及其制作方法，中国发明专利, 授权号：ZL   2020 1 0193302.0，2023.4.11.

[3] 汪洋，苏雪冰，杨帅康，杨红姣，邓志勤. MIS分裂栅GaN基高电子迁移率晶体管及其制备方法，中国发明专利, 授权号：ZL 2021 1 0695398.5，2022.5.17.

[4] 汪洋; 陈锡均; 夹丹丹; 芦俊; 周子杰, 一种内嵌P+ 注入区分段型非对称可控硅静电释放器件, 中国, 发明专利, ZL 2019 1 1118001.5.

[5] 汪洋; 夹丹丹; 杨红姣; 芦俊, 一种高防护等级双向可控硅静电防护器件及其制作方法, 中国, 发明专利, ZL 2018 1 0578171.0.

[6] 汪洋; 陈锡均; 周子杰, 一种低压触发高维持电压可控硅整流器静电释放器件, 中国, 发明专利, ZL 2018 1 0578320.3.

[7] 汪洋; 关健; 金湘亮, 一种嵌套型多指双向可控硅静电防护器件, 中国, 发明专利, ZL 2017 1 0924403.9.

集成电路布图设计登记：

[1] 汪洋，杨帅康. 应用于高压总线端口的对称双向可控硅静电防护器件版图，集成电路设计布图设计登记号：BS.21567474X，2022.6.2.

[2] 汪洋，曹佩. 一种内嵌技术NPN管的双向对称可控硅静电防护器件，中国，集成电路布图设计登记号：BS.205562310.

[3] 汪洋，李婕妤，一种嵌套型非对称双向可控硅静电保护器件，中国，集成电路布图设计登记，BS.205562299.

荣誉奖励

[1] 汪洋，周子杰，董鹏，张继文，黄晖，瞬态电压抑制静电保护器件关键技术及应用，湖南省科技进步三等奖，2020年。

[2] 金湘亮，汪洋，谢亮，杨红姣，崔杨，刘航，马铭磷，高压工艺用芯片级集成的静电释放器件新技术与应用，湖南省科技进步奖三等奖，2015年。